Method of manufacturing semiconductor device reducing variation in thickness of silicon layer among semiconductor wafers
US10090201B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2017 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Mar 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing method includes forming a silicon layer by epitaxial growth over a semiconductor substrate having a first area and a second area; forming a first gate oxide film by oxidizing the silicon layer; removing the first gate oxide film from the second area, while maintaining the first gate oxide film in the first area; thereafter, increasing a thickness of the first gate oxide film in the first area and simultaneously forming a second gate oxide film by oxidizing the silicon layer in the second area; and forming a first gate electrode and a second gate electrode over the first gate oxide film and the second gate oxide film, respectively, wherein after the formation of the first and second gate electrodes, the silicon layer in the first area is thicker than the silicon layer in the second area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.