Method for fabricating LDMOS with self-aligned body
US10090409B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2016 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Sep 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.