Integrated RF circuit with phase-noise test capability
US10090939B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2017 |
| Grant date | Oct 2, 2018 |
| Priority date | — |
| Expiry date | Aug 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B17/14
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.