Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate
US10096708B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2016 |
| Grant date | Oct 9, 2018 |
| Priority date | — |
| Expiry date | Oct 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated electronic device includes a semiconductive film above a buried insulating layer that is situated above a supporting substrate. An active zone is delimited within the semiconductive film. A MOS transistor supported within the active zone includes a gate region situated above the active zone. The gate region includes a rectilinear part situated between source and drain regions. The gate region further includes a forked part extending from the rectilinear part. A raised semiconductive region situated above the active zone is positioned at least partly between portions of the forked part. A substrate contact for the transistor is electrically coupled to the raised semiconductive region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.