Patent · US Active

System level interconnect with programmable switching

US10097185B2 · kind B2 · utility

3Cited by

53References

11Claims

0Family size

Assignee

Cypress Semiconductor Corporation · US

Inventors

Bert Sullam · Bellevue, US
Warren Snyder · Snohomish, US
Haneef Mohammed · Beaverton, US

Key dates

Filing date	Dec 20, 2017
Grant date	Oct 9, 2018
Priority date	—
Expiry date	Dec 20, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/1776
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.