Data invalidation acceleration through approximation of valid data counts
US10101925B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2015 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Jun 15, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller implemented within a non-volatile data storage device with improved efficiency for executing data invalidation commands is disclosed. In one embodiment, the non-volatile data storage device in communication with a host device and comprises a processor, a memory device that includes a plurality of physical storage locations, a cache memory configured to store a map table and a count value. The controller is configured to receive a data invalidation request from the host device where the request includes an execution parameter. Based on the execution parameter, the controller executes the invalidation request in an efficient and flexible manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.