Averting lock contention associated with core-based hardware threading in a split core environment
US10102037B2 · kind B2 · utility
5Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2016 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Dec 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/524
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for managing lock contention in a multithreaded processing system. In one embodiment, a method includes tracking an amount of time that a lock on a first thread prevents a second thread from execution. The method also includes, if the amount of time is greater than a first threshold, storing the amount of time and an address associated with the lock. The method includes dispatching a third thread that utilizes the address associated with the lock. The method also includes increasing the hardware priority of the third thread during a lock operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.