Patent · US Active

Dynamically-adjusted host memory buffer

US10102135B2 · kind B2 · utility

2Cited by
1References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 6, 2016
Grant dateOct 16, 2018
Priority date
Expiry dateAug 22, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Host memory buffer is dynamically adjusted based on performance. As memory pages are accessed, one or more counts of the memory pages are maintained. If the counts indicate some of the memory pages are identical, then a portion of host system memory allocated to buffer cache may be reduced or decremented in response to repetitive access. However, if the counts indicate different memory pages are accessed, then the host system memory allocated to the buffer cache may be increased or incremented.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.