Inventor · Austin, TX, US

Lee Zaretsky

22Patents
5h-index
11Co-inventors
62Inventor score

Filing activity: May 3, 2004 → Feb 28, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7353415B2 System and method for power usage level management of blades installed within blade servers Physics 21 Expired
US7721096B2 Self-authenticating blade server in a secure environment Electricity 13 Active
US10802760B2 Apparatus and method of intelligent dynamic application aware storage device optimization Emerging Cross-Sectional Technologies 9 Active
US7230520B2 Method and apparatus for RF access to system ID and fault information Physics 6 Expired
US10268627B2 Automatically configuring a universal serial bus (USB) type-C port of a computing device Physics 5 Active
US8151011B2 Input-output fabric conflict detection and resolution in a blade compute module system Physics 4 Active
US8582448B2 Method and apparatus for power throttling of highspeed multi-lane serial links Emerging Cross-Sectional Technologies 4 Active
US10102135B2 Dynamically-adjusted host memory buffer Emerging Cross-Sectional Technologies 2 Active
US9519331B2 Method and apparatus for power throttling of highspeed multi-lane serial links Emerging Cross-Sectional Technologies 2 Active
US10769093B2 Automatically configuring a universal serial bus (USB) type-C port of a computing device Physics 1 Active
US11281298B1 System and method for dynamically disabling haptic feedback with recognition of pen on touch sensitive area of an information handling system Physics 1 Active
US8274366B2 Method and apparatus for RF access to system ID and fault information Physics 1 Active
US10795605B2 Storage device buffer in system memory space Emerging Cross-Sectional Technologies 1 Active
US11592894B2 Increasing power efficiency for an information handling system Emerging Cross-Sectional Technologies 0 Active
US11334141B2 System and method for dynamic power control based on a cache size in volatile memory Physics 0 Active
US12315594B2 Controlling memory module clock buffer power in a system with a single memory clock per memory module Physics 0 Active
US11662793B2 Selectively disabling power delivery to a grouping of memory devices of an information handling system Emerging Cross-Sectional Technologies 0 Active
US12230360B2 Controlling memory module clock buffer power in a system with dual memory clocks per memory module Physics 0 Active
US12334187B2 Power reduction in a clock buffer of a memory module based upon memory module topology Physics 0 Active
US11429301B2 Data contextual migration in an information handling system Electricity 0 Active
US12147684B2 Method for power reduction in memory modules Physics 0 Active
US12334188B2 Power reduction in a clock buffer of a memory module based upon memory module speed Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.