Chamber, semiconductor processing station, and semiconductor process using the same
US10103042B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2016 |
| Grant date | Oct 16, 2018 |
| Priority date | — |
| Expiry date | Apr 2, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67303
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chamber includes a sidewall, a cooling pipe, and an external pipe. The cooling pipe includes a first segment extending along the sidewall of the chamber, and includes multiple purge nozzles. The external pipe extends to inside the chamber and is connected to the first segment of the cooling pipe. A semiconductor processing station includes a central transfer chamber, a load lock chamber, and a cooling stage. The load lock chamber and the cooling stage are disposed adjacent to the central transfer chamber. The load lock chamber is adapted to contain a wafer carrier having multiple wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer between the cooling stage and the load lock chamber. A semiconductor process using the semiconductor processing station is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.