Digital low drop-out regulator
US10108211B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 3, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Feb 3, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/618
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A regulator includes: an ADC for detecting a change in an output voltage and outputting an error code; a control signal generation unit for generating a proportional control signal, integral control signals, a counting signal, and an error sign signal based on the error code; a proportional control unit for shifting the error code based on a proportional gain factor, and outputting a first control signal by synchronizing the shifted error code with the proportional control signal; an integral control unit for shifting the integral control signals based on the counting signal, shifting the shifted signals based on an integral gain factor to generate integral pulse signals, and outputting second control signals by controlling a pre-stored code value based on the integral pulse signals and the error sign signal; and a driving unit for outputting first and second currents in response to the first and second control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.