Method and apparatus for saving power of a processor socket in a multi-socket computer system
US10108241B2 · kind B2 · utility
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1References
27Claims
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Key dates
| Filing date | Sep 15, 2014 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Aug 19, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is an apparatus comprising: a plurality of system agents, at least one system agent including one or more queues; and logic to monitor the one or more queues in at least one system agent and to cause the plurality of system agents to block traffic after satisfaction of a criterion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.