Apparatus having a memory cell and a shunt device
US10109346B2 · kind B2 · utility
3Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2014 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Jul 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to an example, an apparatus may include an input line, an output line, and a memory cell connected between the input line and the output line. The memory cell may include a memristor connected in series with a selector. The apparatus may also include a shunt device connected to the input line, in which the shunt device is to divert a portion of current away from the memory cell in response to a voltage at the input line being greater than a threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.