Horizontal gate-all-around device having wrapped-around source and drain
US10109721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2017 |
| Grant date | Oct 23, 2018 |
| Priority date | — |
| Expiry date | Aug 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
Various semiconductor devices, such as horizontal gate-all-around devices, and methods of fabricating such are disclosed herein. An exemplary semiconductor device includes a fin structure having a channel region disposed between a first source/drain region and a second source/drain region. The fin structure includes a first nanowire and a second nanowire disposed in the channel region, the first source/drain region, and the second source/drain region. The fin structure further includes an epitaxial layer that wraps the first nanowire and the second nanowire in the first source/drain region and the second source/drain region. A gate is disposed over the channel region of the fin structure, such that the gate wraps the first nanowire and the second nanowire in the channel region. In some implementations, the first nanowire, the second nanowire, and the epitaxial layer combine to have a vertical bar-like shape in the first source/drain region and the second source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.