Patent · US Active

Method for manufacturing mixed-dimension and void-free MRAM structure

US10109790B2 · kind B2 · utility

6Cited by
3References
20Claims
0Family size

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Key dates

Filing dateAug 22, 2017
Grant dateOct 23, 2018
Priority date
Expiry dateAug 22, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B61/22

Abstract

A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a substrate; forming an MRAM structure over the substrate; forming a first dielectric layer over the MRAM structure; forming a stop layer over the first dielectric layer; forming a second dielectric layer over the stop layer; and removing the second dielectric layer, the stop layer and at least a portion of the first dielectric layer through a planarization operation without exposing a top electrode of the MRAM structure. Associated methods are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.