Inventor · Taipei, TW

Hung Cho Wang

72Patents
7h-index
37Co-inventors
68Inventor score

Filing activity: Dec 13, 2013 → Jan 10, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US10038137B2 MRAM device and method for fabricating the same Electricity 44 Active
US9780301B1 Method for manufacturing mixed-dimension and void-free MRAM structure Electricity 14 Active
US10522740B2 Techniques for MRAM MTJ top electrode to metal layer interface including spacer Electricity 12 Active
US10164169B2 Memory device having a single bottom electrode layer Electricity 9 Active
US10790439B2 Memory cell with top electrode via Electricity 9 Active
US10727274B2 Techniques for MRAM top electrode via connection Electricity 8 Active
US9666790B2 Manufacturing techniques and corresponding devices for magnetic tunnel junction devices Electricity 7 Active
US9842986B2 Semiconductor structure and method of forming the same Electricity 7 Active
US10109790B2 Method for manufacturing mixed-dimension and void-free MRAM structure Electricity 6 Active
US10797230B2 Techniques for MRAM MTJ top electrode to metal layer interface including spacer Electricity 4 Active
US11075335B2 Techniques for MRAM MTJ top electrode connection Electricity 4 Active
US10504958B2 Semiconductor structure and manufacturing method of the same Electricity 4 Active
US11005032B2 Techniques for MRAM MTJ top electrode to metal layer interface including spacer Electricity 3 Active
US11355696B2 Magnetic tunnel junction structures and related methods Electricity 3 Active
US10134807B2 Structure and formation method of integrated circuit structure Electricity 2 Active
US10497861B2 Manufacturing techniques and corresponding devices for magnetic tunnel junction devices Electricity 2 Active
US11189659B2 Techniques for MRAM MTJ top electrode to via interface Electricity 2 Active
US11551736B2 Semiconductor device and method for fabricating the same Electricity 2 Active
US10636961B2 Semiconductor structure and method of forming the same Electricity 2 Active
US11043531B2 Semiconductor structure and manufacturing method of the same Electricity 1 Active
US11437433B2 Techniques for MRAM top electrode via connection Electricity 1 Active
US11063208B2 Embedded MRAM fabrication process for ion beam etching with protection by top electrode spacer Electricity 1 Active
US11121308B2 Sidewall spacer structure for memory cell Electricity 1 Active
US11659775B2 Embedded MRAM fabrication process for ion beam etching with protection by top electrode spacer Electricity 1 Active
US10270026B2 Multilayered spacer structure for a magnetic tunneling junction and method of manufacturing Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.