Manufacturing of silicon strained in tension on insulator by amorphisation then recrystallisation
US10115590B2 · kind B2 · utility
2Cited by
2References
19Claims
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Key dates
| Filing date | Apr 18, 2017 |
| Grant date | Oct 30, 2018 |
| Priority date | — |
| Expiry date | Apr 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/796
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Method for making a strained silicon structure, wherein a silicon germanium layer is formed on the silicon layer, followed by another layer with a lower concentration of germanium before selective amorphisation of the silicon and silicon germanium layer relative to this other layer before the assembly is recrystallised so as to strain the silicon semiconducting layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.