Trim techniques for voltage reference circuits
US10120399B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2017 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Dec 20, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An example method of trimming a voltage reference in an integrated circuit (IC) includes at a first temperature, sequencing through a first plurality of trim codes for a reference circuit of the voltage reference configured to generate a proportional-to-temperature current and a corresponding first control voltage, and a complementary-to-temperature current and a corresponding second control voltage. The method further includes measuring a voltage output of the voltage reference for each of the first plurality of trim codes to obtain first voltage output values. The method further includes at a second temperature, sequencing through a second plurality of trim codes for the reference circuit. The method further includes measuring the voltage output of the voltage reference for each of the second plurality of trim codes to obtain second voltage output values. The method further includes selecting a trim code for the reference circuit based on the first voltage output values and the second voltage output values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.