Global variable optimization for integrated circuit applications
US10120969B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2016 |
| Grant date | Nov 6, 2018 |
| Priority date | — |
| Expiry date | Dec 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for generating and deploying integrated circuit (IC) applications are provided. Global variable implementation logic may be used to optimize implementation, on an integrated circuit, of functionality represented by high-level code including global variables. A compiler's intermediate representation is analyzed for one or more characteristics that may be used to determine one or more initialization parameters, one or more scope parameters, one or more implementation parameters, or any combination thereof of the functionality. An HDL is generated based upon the one or more initialization parameters, the one or more scope parameters, the one or more implementation parameters, or the any combination thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.