Patent · US Active

Processing of a circuit design for debugging

US10126361B1 · kind B1 · utility

1Cited by

30References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Xiaojian Yang · Sunnyvale, US
Maogang Wang · Palo Alto, US
Grigor S. Gasparyan · San Jose, US
Raoul Badaoui · San Jose, US

Key dates

Filing date	Nov 14, 2016
Grant date	Nov 13, 2018
Priority date	—
Expiry date	Apr 13, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/331
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Processing a circuit design that specifies application logic and debugging logic includes partitioning the circuit design. Each partition includes a part of the application logic and a part of the debugging logic, each partition is specified for implementation on a respective IC die, and the circuit design specifies connections between a part of the application logic in one partition and a part of the debugging logic in another partition. The connections between the part of the application logic in the one partition and the part of the debugging logic in the other partition are changed to connections from the part of the application logic in the one partition to a part of the debugging logic in the one partition. The part of the application logic and the part of the debugging logic of each partition are placed and routed on the respective IC die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.