Insulated gate power semiconductor device and method for manufacturing such a device
US10128361B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2017 |
| Grant date | Nov 13, 2018 |
| Priority date | — |
| Expiry date | Jul 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/142
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An insulated gate power semiconductor device has an (n−) doped drift layer between an emitter side and a collector side. A trench gate electrode has a trench bottom and trench lateral sides and extends to a trench depth. A p doped first protection pillow covers the trench bottom. An n doped second protection pillow encircles the trench gate electrode at its trench lateral sides. The second protection pillow has a maximum doping concentration in a first depth, which is at least half the trench depth, wherein a doping concentration of the second protection pillow decreases towards the emitter side from the maximum doping concentration to a value of not more than half the maximum doping concentration. An n doped enhancement layer has a maximum doping concentration in a second depth, which is lower than the first depth, wherein the doping concentration has a local doping concentration minimum between the second depth and the first depth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.