Structure and formation method of integrated circuit structure

US10134807B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Harry-Hak-Lay Chuang · Austin, US
• Hung Cho Wang · Taipei, TW
• Wen-Chun You · Zilongting, TW

Key dates

• Filing date: Mar 16, 2017
• Grant date: Nov 20, 2018
• Expiry date: Mar 16, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/10

Abstract

Integrated circuit structures and methods for forming the same are provided. An integrated circuit includes a dielectric layer in a memory region and a logic region. The integrated circuit structure also includes a first conductive feature in the dielectric layer in the memory region. The integrated circuit structure further includes a second conductive feature in the dielectric layer in the logic region. In addition, the integrated circuit structure includes an active memory cell over the dielectric layer in the memory region. The active memory cell is connected to the first conductive feature. The integrated circuit structure also includes a dummy memory cell over the dielectric layer in the logic region. The dummy memory cell is connected to the second conductive feature.