Patent · US Active

Digital frequency synthesizer with robust injection locked divider

US10135452B2 · kind B2 · utility

14Cited by
4References
10Claims
0Family size

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Key dates

Filing dateFeb 21, 2017
Grant dateNov 20, 2018
Priority date
Expiry dateFeb 21, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L2207/50
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The disclosure is directed to a frequency synthesizer circuit including digitally controlled oscillator (DCO) and an injection locked digitally controlled oscillator (ILD). The ILD outputs a signal with a frequency that is some fraction of the frequency of the DCO output signal and locked in phase to the DCO output signal. The frequency synthesizer circuit drives the ILD with the same modulation input signal that drives the DCO, with the modulation input signal scaled to account for any mismatch between the gains of the DCO and ILD. Driving the ILD with the same, scaled modulation signal as the main DCO minimizes the frequency offset between the DCO output signal and the divided natural oscillation frequency of the ILD. Minimizing the frequency offset makes the lock of the ILD more robust and reduces jitter contribution from the ILD.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.