Electronic device, reconfigurable processor and controlling methods thereof
US10140247B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 6, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Sep 6, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses are provided for compressing configuration data. The configuration data, which includes control data corresponding to at least one processing unit used in each of a plurality of cycles, is stored. A plurality of processing units of a reconfigurable processor is divided into a plurality of groups. The configuration data is partitioned into a plurality of pieces of sub-configuration data. Each piece of sub-configuration data corresponding to a respective one of the plurality of groups. If a plurality of adjacent cycles include identical control data, the configuration data is compressed by deleting control data of all but one of the plurality of adjacent cycles, for each sub-configuration data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.