Patent · US Active

Critical region identification

US10140414B2 · kind B2 · utility

0Cited by
48References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 5, 2016
Grant dateNov 27, 2018
Priority date
Expiry dateApr 5, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system to identify a region of a design block of an integrated circuit for redesign are described. The method includes dividing the design block into grids, each of the grids including a corresponding number of logic elements. The method also includes filtering each of the grids based on a specified criteria, the filtering including determining a number (B) of the corresponding logic elements among a total number (A) of the logic elements in each grid that meet the specified criteria. The region is a set of two or more of the grids based on a result of the filtering.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.