Integrated circuit packages and methods of forming same
US10141201B2 · kind B2 · utility
3Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2014 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Aug 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit packages and methods of forming the same are disclosed. A first die is mounted on a first side of a package substrate. A heat dissipation feature is attached on a first side of the first die. A second die is mounted on a second side of the first die, wherein the second die is at least partially disposed in a through hole formed in the package substrate. An encapsulant is formed on the first side of the package substrate around the first die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.