Chi-Yang Yu
42Patents
3h-index
21Co-inventors
55Inventor score
Filing activity: Aug 27, 2014 → Aug 9, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10157871B1 | Integrated fan-out package and manufacturing method thereof | Electricity | 13 | Active |
| US9865566B1 | Semiconductor structure and manufacturing method thereof | Electricity | 7 | Active |
| US10141201B2 | Integrated circuit packages and methods of forming same | Electricity | 3 | Active |
| US11244879B2 | Semiconductor package | Electricity | 3 | Active |
| US9812410B2 | Lid structure for a semiconductor device package and method for forming the same | Electricity | 3 | Active |
| US10790210B2 | Semiconductor package and manufacturing method thereof | Electricity | 2 | Active |
| US10522436B2 | Planarization of semiconductor packages and structures resulting therefrom | Electricity | 2 | Active |
| US10957672B2 | Package structure and method of manufacturing the same | Electricity | 2 | Active |
| US10276508B2 | Semiconductor packages and methods of forming the same | Electricity | 2 | Active |
| US11145639B2 | Semiconductor package and manufacturing method thereof | Electricity | 2 | Active |
| US11127644B2 | Planarization of semiconductor packages and structures resulting therefrom | Electricity | 1 | Active |
| US9666556B2 | Flip chip packaging | Electricity | 1 | Active |
| US11424220B2 | Semiconductor structure and manufacturing method thereof | Electricity | 1 | Active |
| US9941186B2 | Method for manufacturing semiconductor structure | Electricity | 1 | Active |
| US11315862B2 | Semiconductor structure and manufacturing method thereof | Electricity | 1 | Active |
| US11705408B2 | Semiconductor package | Electricity | 1 | Active |
| US10157863B2 | Method for forming a lid structure for a semiconductor device package | Electricity | 1 | Active |
| US10804245B2 | Semiconductor structure and manufacturing method thereof | Electricity | 1 | Active |
| US10700031B2 | Integrated fan-out package and manufacturing method thereof | Electricity | 1 | Active |
| US11824032B2 | Die corner removal for underfill crack suppression in semiconductor die packaging | Electricity | 0 | Active |
| US12412862B2 | Package structure and manufacturing method thereof | Electricity | 0 | Active |
| US12165946B2 | Semiconductor package and manufacturing method thereof | Electricity | 0 | Active |
| US11264304B2 | Semiconductor structure and associated method for manufacturing the same | Electricity | 0 | Active |
| US10622278B2 | Semiconductor structure and associated method for manufacturing the same | Electricity | 0 | Active |
| US11355461B2 | Integrated fan-out package and manufacturing method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.