Patent · US Active

Three dimensional memory device and method for fabricating the same

US10141328B2 · kind B2 · utility

2Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 15, 2016
Grant dateNov 27, 2018
Priority date—
Expiry dateFeb 8, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/35
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A 3D memory device includes a substrate, a ridge-shaped stack, a memory layer, a channel layer and a capping layer. The ridge-shaped stack includes a plurality of conductive strips extending along a first direction and stacked on the substrate. The memory layer is stacked on a vertical sidewall of the ridge-shaped stack along a second direction that forms a non-straight with the first direction. The channel layer is stacked on the memory layer along the second direction and has a narrow sidewall having a long side extending along the first direction. The capping layer is stacked on the narrow sidewall along a third direction that forms a non-straight angle with the second direction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.