Modular serializer and deserializer
US10141949B1 · kind B1 · utility
3Cited by
6References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 7, 2017 |
| Grant date | Nov 27, 2018 |
| Priority date | — |
| Expiry date | Nov 7, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Modular serializer and deserializer circuits convert a data input in a variety of applications. The serializer includes an array of cells that receive a parallel data input and transfer the word, row by row, to an output buffer that generates a corresponding serial data output. The deserializer includes an input buffer that receives a serial data input and transfers partial words sequentially through an array of cells. When the word fully occupies the cells, the array transmits the word as a parallel data output. A modular clock operates to clock the modular serializer and deserializer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.