Mark Spaeth
6Patents
3h-index
3Co-inventors
46Inventor score
Filing activity: May 25, 2001 → Oct 19, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6407687B2 | System and method for reducing timing mismatch in sample and hold circuits using an FFT and subcircuit reassignment | Physics | 19 | Expired |
| US6518800B2 | System and method for reducing timing mismatch in sample and hold circuits using the clock | Physics | 17 | Expired |
| US6483448B2 | System and method for reducing timing mismatch in sample and hold circuits using an FFT and decimation | Physics | 12 | Expired |
| US10141949B1 | Modular serializer and deserializer | Emerging Cross-Sectional Technologies | 3 | Active |
| US8536944B2 | Differential amplifier with de-emphasis | Electricity | 3 | Active |
| US10396803B2 | Clock and data recovery of sub-rate data | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.