Robust write driver scheme for static random access memory compilers
US10147483B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2017 |
| Grant date | Dec 4, 2018 |
| Priority date | — |
| Expiry date | Sep 19, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and apparatus for writing data into a static random access memory (SRAM) are provided. A write driver circuit includes a bitcell array, a bitline coupled to the bitcell array, and a first driving circuit configured to drive the bitline via a write driver node for writing data into a bitcell for a write operation. The write driver circuit also includes a pre-charging circuit configured to control or to operate with the write driver circuit to drive the write driver node to a high voltage level or a low voltage level for the write operation, and pre-charge the write driver node to the high voltage level, and float the write driver node for a bit-masking operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.