Rakesh Sinha
69Patents
10h-index
83Co-inventors
81Inventor score
Filing activity: Jan 31, 2000 → Oct 4, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6904462B1 | Method and system for allocating protection path resources | Electricity | 43 | Expired |
| US6728214B1 | Testing of network routers under given routing protocols | Electricity | 39 | Expired |
| US8441874B2 | Memory device with robust write assist | Physics | 26 | Active |
| US8411518B2 | Memory device with boost compensation | Physics | 19 | Active |
| US9756112B2 | Method and system for managing service quality according to network status predictions | Electricity | 16 | Active |
| US9880837B2 | Artifact manager for release automation | Physics | 14 | Active |
| US9030863B2 | Read/write assist for memories | Electricity | 14 | Active |
| US10432342B1 | Routing and regenerator planning in a carrier's core reconfigurable optical network | Electricity | 11 | Active |
| US7551550B2 | Method and system for allocating protection path resources | Electricity | 10 | Active |
| US6697335B1 | Quality of service routing in information networks over paths having performance-dependent costs | Electricity | 10 | Expired |
| US9928889B1 | Bitline precharge control and tracking scheme providing increased memory cycle speed for pseudo-dual-port memories | Physics | 9 | Active |
| US8693267B2 | Signal synchronization in multi-voltage domains | Physics | 8 | Active |
| US9652211B2 | Policy management of deployment plans | Physics | 8 | Active |
| US6412054B1 | Storage disk declustering method | Emerging Cross-Sectional Technologies | 8 | Expired |
| US9875790B1 | Boost charge recycle for low-power memory | Physics | 8 | Active |
| US10397123B2 | Method and system for managing service quality according to network status predictions | Electricity | 7 | Active |
| US9837144B1 | Apparatus and method for controlling boost capacitance for low power memory circuits | Physics | 7 | Active |
| US9947419B1 | Apparatus and method for implementing design for testability (DFT) for bitline drivers of memory circuits | Physics | 6 | Active |
| US7254141B1 | Method, system and storage medium for allocating bandwidth in a communication network | Electricity | 5 | Expired |
| US8010694B2 | Network performance and reliability evaluation taking into account multiple traffic matrices | Electricity | 5 | Active |
| US6985445B1 | Generation of test suites for interoperability of reactive communication systems | Electricity | 5 | Expired |
| US8406622B2 | 1:N sparing of router resources at geographically dispersed locations | Electricity | 5 | Active |
| US10693575B2 | System and method for throughput prediction for cellular networks | Physics | 4 | Active |
| US8761601B2 | 1:N sparing of router resources at geographically dispersed locations | Electricity | 4 | Active |
| US10147483B1 | Robust write driver scheme for static random access memory compilers | Physics | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.