Integrated circuit device and method of fabricating the same
US10153277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2016 |
| Grant date | Dec 11, 2018 |
| Priority date | — |
| Expiry date | Dec 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/08
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes: a pair of width-setting patterns over a substrate, the pair of width-setting patterns defining a width of a gate structure space in a first direction and extending in a second direction intersecting with the first direction. A gate electrode layer is provided that extends in the gate structure space along the second direction. A gate insulating layer is provided in the gate structure space and between the substrate and the gate electrode layer. An insulating spacer is provides on the pair of width-setting patterns, the insulating spacer covering both sidewalls of the gate electrode layer, wherein the pair of width-setting patterns have a carbon content that is greater than a carbon content of the insulating spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.