Systems and methods for frequency mode detection and implementation
US10162406B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Aug 31, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2272
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The systems and methods provided herein identify a command acquisition mode from a plurality of command acquisition modes of a command interface of a memory device. A state of a chip select signal (CS) is identified. When the CS transitions to low from high, a first portion of a command address is captured in a first clock cycle after the CS transitions. When the command acquisition mode is in a first mode, a second portion of the command address is captured in a second clock cycle immediately after the first clock cycle. Otherwise, when the command acquisition mode is in a second mode, the second portion of the command address is captured in a third clock cycle immediately following the second clock signal. An internal command is fired, using the first portion of the command address and the second portion of the command address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.