Alignment marks in substrate having through-substrate via (TSV)
US10163706B2 · kind B2 · utility
1Cited by
41References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2014 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | May 31, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a substrate, and an alignment mark including a conductive through-substrate via (TSV) penetrating through the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.