Semiconductor device with post passivation structure and fabrication method therefor
US10163831B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 6, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Jul 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming a first contact pad and a second contact pad over a first passivation layer, depositing a first buffer layer over the first contact pad and the second contact pad, and depositing a second buffer layer over the first buffer layer and the second contact pad. The first contact pad is in a circuit region and the second contact pad is in a non-circuit region. An edge of the second contact pad is exposed and a periphery of the first contact pad and an edge of the second contact pad are covered by the first buffer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.