Semiconductor device and manufacturing method thereof
US10164012B2 · kind B2 · utility
23Cited by
0References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2016 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Mar 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes first channel layers disposed over a substrate, a first source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the first channel layers, a gate electrode layer disposed on the gate dielectric layer and wrapping each of the first channel layers, and a liner semiconductor layer disposed between the first channel layers and the first source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.