Inventor · Hsinchu, TW

Kuo-Cheng Ching

342Patents
21h-index
87Co-inventors
89Inventor score

Filing activity: Sep 17, 2008 → May 21, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US9608116B2 FINFETs with wrap-around silicide and method forming the same Electricity 1,148 Active
US9209247B2 Self-aligned wrapped-around structure Electricity 670 Active
US9412828B2 Aligned gate-all-around structure Electricity 642 Active
US9418897B1 Wrap around silicide for FinFETs Electricity 207 Active
US8680576B2 CMOS device and method of forming the same Electricity 197 Active
US8633516B1 Source/drain stack stressor for semiconductor device Electricity 186 Active
US9818872B2 Multi-gate device and method of fabrication thereof Electricity 150 Active
US9887269B2 Multi-gate device and method of fabrication thereof Electricity 134 Active
US9881993B2 Method of forming semiconductor structure with horizontal gate all around structure Electricity 124 Active
US10157799B2 Multi-gate device and method of fabrication thereof Electricity 123 Active
US8901607B2 Semiconductor device and fabricating the same Electricity 52 Active
US9006786B2 Fin structure of semiconductor device Electricity 43 Active
US9184269B2 Silicon and silicon germanium nanowire formation Electricity 34 Active
US8815691B2 Method of fabricating a gate all around device Electricity 31 Active
US10164012B2 Semiconductor device and manufacturing method thereof Electricity 23 Active
US9478624B2 Self-aligned wrapped-around structure Electricity 23 Active
US9006842B2 Tuning strain in semiconductor devices Electricity 23 Active
US9634091B2 Silicon and silicon germanium nanowire formation Electricity 21 Active
US9318606B2 FinFET device and method of fabricating same Electricity 21 Active
US9202917B2 Buried SiGe oxide FinFET scheme for device enhancement Electricity 21 Active
US9935199B2 FinFET with source/drain structure Electricity 21 Active
US9991262B1 Semiconductor device on hybrid substrate and method of manufacturing the same Electricity 20 Active
US9449975B1 FinFET devices and methods of forming Electricity 20 Active
US10211307B2 Methods of manufacturing inner spacers in a gate-all-around (GAA) FET through multi-layer spacer replacement Electricity 19 Active
US9209185B2 Method and structure for FinFET device Electricity 19 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.