Semiconductor structure with protection layer
US10164063B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2017 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Feb 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
The method for forming a semiconductor structure includes forming a protection layer having a first portion and a second portion over a substrate and forming a dummy gate layer over the first portion and the second portion of the protection layer. The method for forming a semiconductor structure further includes patterning the dummy gate layer to form a dummy gate structure over the first portion of the protection layer and forming a spacer on a sidewall of the dummy gate structure over a second portion of the protection layer. The method for forming a semiconductor structure further includes replacing the first portion of the protection layer and the dummy gate structure by a gate dielectric layer and a gate electrode layer. In addition, a thickness of the protection layer is greater than a thickness of the gate dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.