Stacked independently contacted field effect transistor having electrically separated first and second gates
US10164121B2 · kind B2 · utility
5Cited by
5References
8Claims
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Key dates
| Filing date | Jun 13, 2016 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Jun 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A semiconductor device including: a substrate; a first active layer on the substrate and including a first channel between a source and a drain; a second active layer stacked on the first active layer, the second active layer including a second channel between the source and the drain; a first gate corresponding to the first channel; and a second gate electrically separated from the first gate and corresponding to the second channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.