Patent · US Active

Resistive memory apparatus and setting method for resistive memory cell thereof

US10170184B1 · kind B1 · utility

2Cited by
3References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 11, 2017
Grant dateJan 1, 2019
Priority date
Expiry dateOct 11, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2013/0078
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A resistive memory apparatus and a setting method for a resistive memory cell thereof are provided. The setting method includes: performing a first setting operation on the resistive memory cell, and performing a first verifying operation on the resistive memory cell after the first setting operation is finished; determining whether to perform a first resetting operation on the resistive memory cell according to a verifying result of the first verifying operation, and performing a second verifying operation on the resistive memory cell after the first resetting operation is determined to be performed and is finished; and determining whether to perform a second resetting operation on the resistive memory cell according to a verifying result of the second verifying operation, and performing a third verifying operation on the resistive memory cell after the second resetting operation is determined to be performed and is finished.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.