Low temperature fabrication of lateral thin film varistor
US10170224B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Nov 22, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Nov 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may include a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.