Methods and apparatus providing a graded package for a semiconductor
US10170384B2 · kind B2 · utility
0Cited by
3References
11Claims
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Key dates
| Filing date | Jun 12, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Jun 12, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus providing a graded package for a semiconductor are disclosed. An example apparatus includes a die; and a graded package encapsulating the die, the graded package including a material that is spatially varied from a first location of the graded package to a second location of the graded package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.