Testing of semiconductor chips with microbumps
US10175294B2 · kind B2 · utility
12Cited by
85References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2017 |
| Grant date | Jan 8, 2019 |
| Priority date | — |
| Expiry date | Apr 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16238
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A device includes a test pad on a chip. A first microbump has a first surface area that is less than a surface area of the test pad. A first conductive path couples the test pad to the first microbump. A second microbump has a second surface area that is less than the surface area of the test pad. A second conductive path couples the test pad to the second microbump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.