Patent · US Active

Burn-in testing of circuits

US10180455B2 · kind B2 · utility

0Cited by
1References
20Claims
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Key dates

Filing dateMay 22, 2017
Grant dateJan 15, 2019
Priority date
Expiry dateJul 11, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/30
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Circuits and methods are provided for a signal path between circuit parts. During normal operation, a delay is deactivated. During a burn-in test, the delay is activated. In the deactivated state, a delay component may be disconnected from a supply voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.