Method for the formation of transistors PDSO1 and FDSO1 on a same substrate
US10181429B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2017 |
| Grant date | Jan 15, 2019 |
| Priority date | — |
| Expiry date | May 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D87/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for forming an electronic device intended to accommodate at least one fully depleted transistor of the FDSOI type and at least one partially depleted transistor of the PDSOI type, from a stack of layers (10) comprising at least one insulating layer (100) topped with at least one active layer (200) made of a semiconductor material, the method comprising at least one step of dry etching and one step of height adjustment between at least two etched elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.