Memory device that executes an erase operation for a nonvolatile memory
US10186326B2 · kind B2 · utility
4Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2017 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Nov 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/349
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a memory device includes a controller, and a nonvolatile memory in which an erase operation is controlled by the controller, the nonvolatile memory including blocks, the erase operation executing every block, the nonvolatile memory transferring a first reply showing a completion of the erase operation and a fail bit count showing a number of memory cells in which a data erase is uncompleted after the completion of the erase operation to the controller. The controller selects a target block as a target of the erase operation based on the fail bit count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.