Electrostatic discharge circuit
US10186506B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 19, 2017 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Jul 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge circuit may include a substrate, an N+ buried layer in the substrate, an n-type epitaxial layer on the N+ buried layer and the substrate, a first P− region in an anode region of the n-type epitaxial layer, a first N+ region in the first P− region, an N-well in a cathode region of the n-type epitaxial layer, a first P+ region in the N-well, and a second N+ region located in the N-well. The first N+ region may be located closer to the second N+ region than the first P+ region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.