Level shifting circuit with data resolution and grounded input nodes
US10187061B1 · kind B1 · utility
8Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2017 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Jun 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for operating a level shifter circuit that receives an input signal of interderminate voltage level is disclosed. The level shifter circuit may receive the input signal from a circuit block coupled to a first power supply signal, and generate an output signal using a second power supply signal, different than the first power supply signal. The level shifter circuit may clamp a storage node included in the level shifter circuit, and isolated at least one circuit path included in the level shifter circuit in response to a determination that an isolation signal has been enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.