Method for making a semiconductor device including threshold voltage measurement circuitry
US10191105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 16, 2017 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Aug 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45368
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for making a semiconductor device may include forming active circuitry on a substrate including differential transistor pairs, and forming threshold voltage test circuitry on the substrate. The threshold voltage test circuitry may include a pair of differential test transistors replicating the differential transistor pairs within the active circuitry, with each test transistor having a respective input and output, and at least one gain stage configured to amplify a difference between the outputs of the differential test transistors for measuring a threshold voltage thereof. The differential transistor pairs and the pair of differential test transistors each includes spaced apart source and drain regions, a channel region extending between the source and drain regions, and a gate overlying the channel region. Moreover, each of the channel regions may include a superlattice.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.